rev.2.00, mar.11.2 004, page 1 of 9 HD74LV1GW97A configurable multiple?function gate rej03d0083?0200z rev.2.00 mar.11.2004 description the HD74LV1GW97A has co nfigurable multiple?function gate in a 6 pin package. the output state is determined by eight patterns of 3?bit input. the user can choose the logic functions and, nand, or, nor, inverter, non? invert buffer, data selector. low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. features ? the basic gate function is lined up as renesas uni logic series. ? supplied on emboss taping for high-speed automatic mounting. ? supply voltage range : 1.65 to 5.5 v operating temperature range : ?40 to +85c ? all inputs v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) all outputs v o (max.) = 5.5 v (@v cc = 0 v) ? output current 6 ma (@v cc = 3.0 v to 3.6 v), 12 ma (@v cc = 4.5 v to 5.5 v) ? all the logical input has hysteresis voltage for the slow transition. ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) HD74LV1GW97Acme cmpak-6 pin cmpak-6v(o) cm e (3,000 pcs / reel) outline and article indication HD74LV1GW97A marking = control code w 2 index band cmpak?6
HD74LV1GW97A rev.2.00, mar.11.2 004, page 2 of 9 function table inputs output in2 in1 in0 y llll llhl lhlh lhhh hl l l hl hh hhl l hhhh h : high level l : low level pin arrangement (top view) v cc 2 5 gnd 6 in2 1 in1 3 in0 4 y logic diagram in0 in1 in2 y
HD74LV1GW97A rev.2.00, mar.11.2 004, page 3 of 9 function selection table logic function figure no. 2 to 1 data selector 1 2?inputs and 2 2?inputs or with one input inverted 3 2?inputs nand with one input inverted 3 2?inputs and with one input inverted 4 2?inputs nor with one input inverted 4 2?inputs or 5 inverter 6 non?inverter buffer 7
HD74LV1GW97A rev.2.00, mar.11.2 004, page 4 of 9 logic configurations figure 1. 2 to 1 data selecter a b 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a /b v cc y y a a /b b figure 2. 2?inputs and gate b 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y y a b y a b figure 4. 2?inputs and gate with a input inverted y b a b 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y y a b y a 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y figure 6. inverter y a 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y figure 7. non?invert butter figure 3. 2?inputs or gate with a input inverted b 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y y y a b a b b y a b y a b 1 (in1) (in2) 6 2 (gnd) (v cc ) 5 3 (in0) (y) 4 a v cc y figure 5. 2?inputs or gate
HD74LV1GW97A rev.2.00, mar.11.2 004, page 5 of 9 absolute maximum ratings item symbol ratings unit test conditions supply voltage range v cc ?0.5 to 7.0 v input voltage range *1 v i ?0.5 to 7.0 v ?0.5 to v cc + 0.5 output : h or l output voltage range *1, 2 v o ?0.5 to 7.0 v v cc : off input clamp current i ik ?20 ma v i < 0 output clamp current i ok 50 ma v o < 0 or v o > v cc continuous output current i o 25 ma v o = 0 to v cc continuous current through v cc or gnd i cc or i gnd 50 ma maximum power dissipation at ta = 25c (in still air) *3 p t 200 mw storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 5.5 v maximum. 3. the maximum package power dissipation was calculated using a junction temperature of 150c. recommended operating conditions item symbol min max unit conditions supply voltage range v cc 1.65 5.5 v input voltage range v i 05.5v output voltage range v o 0v cc v ?1 v cc = 1.65 to 1.95 v ?2 v cc = 2.3 to 2.7 v ?6 v cc = 3.0 to 3.6 v i ol ?12 v cc = 4.5 to 5.5 v ??1 v cc = 1.65 to 1.95 v ??2 v cc = 2.3 to 2.7 v ??6 v cc = 3.0 to 3.6 v output current i oh ? ?12 ma v cc = 4.5 to 5.5 v 0 300 v cc = 1.65 to 1.95 v 0 200 v cc = 2.3 to 2.7 v 0 100 v cc = 3.0 to 3.6 v input transition rise or fall rate ? t / ? v 020 ns / v v cc = 4.5 to 5.5 v operating free-air temperature t a ?40 85 c note: unused or floating inputs must be held high or low.
HD74LV1GW97A rev.2.00, mar.11.2 004, page 6 of 9 electrical characteristics ta = ?40 to 85c item symbol v cc (v) min typ max unit test condition 1.65 to 1.95 ? ? v cc 0.75 2.5 ? ? 1.75 3.3 ? ? 2.31 v t + 5.0 ? ? 3.50 1.65 to 1.95 v cc 0.25 ? ? 2.5 0.75 ? ? 3.3 0.99 ? ? v t ? 5.0 1.5 ? ? 1.65 to 1.95 0.1 ? v cc 0.4 2.5 0.25 ? 1.0 3.3 0.33 ? 1.32 threshold voltage ? v t 5.0 0.5 ? 2.0 v min to max v cc ?0.1 ? ? i oh = ?50 a 1.65 1.4 ? ? i oh = ?1 ma 2.3 2.0 ? ? i oh = ?2 ma 3.0 2.48 ? ? i oh = ?6 ma v oh 4.5 3.8 ? ? i oh = ?12 ma min to max ? ? 0.1 i ol = 50 a 1.65 ? ? 0.3 i ol = 1 ma 2.3 ? ? 0.4 i ol = 2 ma 3.0 ? ? 0.44 i ol = 6 ma output voltage v ol 4.5 ? ? 0.55 v i ol = 12 ma input current i in 0 to 5.5 ? ? 1 av in = 5.5 v or gnd quiescent supply current i cc 5.5 ? ? 10 av in = v cc or gnd, i o = 0 output leakage current i off 0??5 av in or v o = 0 to 5.5 v input capacitance c in 3.3 ? 3.0 ? pf v in = v cc or gnd note: for conditions shown as min or max, use the appr opriate values under recommended operating conditions.
HD74LV1GW97A rev.2.00, mar.11.2 004, page 7 of 9 switching characteristics v cc = 1.80.15 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 15.8 29.4 1.0 33.0 c l = 15 pf propagation delay time t plh t phl ? 22.6 40.9 1.0 45.0 ns c l = 50 pf in y v cc = 2.50.2 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 9.4 17.6 1.0 21.0 c l = 15 pf propagation delay time t plh t phl ? 12.6 22.6 1.0 26.5 ns c l = 50 pf in y v cc = 3.30.3 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 7.0 11.0 1.0 13.0 c l = 15 pf propagation delay time t plh t phl ? 9.5 14.5 1.0 16.5 ns c l = 50 pf in y v cc = 5.00.5 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 4.8 6.8 1.0 8.0 c l = 15 pf propagation delay time t plh t phl ? 6.3 8.8 1.0 10.0 ns c l = 50 pf in y operating characteristics c l = 50 pf ta = 25c item symbol v cc (v) min typ max unit test conditions 3.3 ? 8.5 ? power dissipation capacitance c pd 5.0 ? 10.0 ? pf f = 10 mhz
HD74LV1GW97A rev.2.00, mar.11.2 004, page 8 of 9 test circuit c l measurement point note: c l includes probe and jig capacitance. * input in phase output 90% 50% 10% t plh t phl v cc gnd v oh v ol t phl t plh 90% 50% 10% 50% 50% 50% 50% ? waveforms out of phase output v oh v ol notes: 1. input waveform : prr 1 mhz, zo = 50 ? , t r 3 ns, t f 3 ns. 2. the output are measured one at a time with one transition per measurement. t r t f
HD74LV1GW97A rev.2.00, mar.11.2 004, page 9 of 9 package dimensions 0.15 0.05 2.0 0.1* (0.1) + 0.1 ? 0.05 package code jedec jeita mass (reference value) cmpak-6v(o) ? conforms 0.006 g unit: mm 1.3 0.05* (2.1) 6 ? 0.2 + 0.02 ? 0.03 0.88 (0.65) (0.65) (1.3) 0.025 ? 0.1 * sn-bi plating. ** the value does not include resin bar. (one side: 0.15 mm (max))
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